Memory devices such as MRAM have been continuously scaled down in size to accommodate complex device requirements and low power consumption demands. However, the smaller form factor has also increased the complexity of memory device fabrication. Critical dimensions (CD) of memory cells are smaller in back-end-of-line (BEOL) process variations. A particular area of challenge faced by manufacturers is to form a pillar-shaped conductor being a MTJ stack/structure in MRAM accurately and consistently into a desired shape or surface type due to limited process margin.
Etching of a MTJ may cause sidewall erosion, resulting in tapering of the pillar contact tip instead of formation of a square tip (flat, uniform contact surface), since known MTJ etch involves physical bombardment from noble gas. More metal via filling materials are re-sputtered during MTJ etch thus re-deposited along the sidewall of MTJ, which causes the FL and the magnetically fixed (pinned) layer partial shorted through the tunneling barrier layer.
A need therefore exists for cost effective methodology enabling formation of a MTJ bottom metal via in a memory cell having more etch time for over-etching thereby physically removing re-deposited sidewall materials, and the resulting device.